Porous Single Crystal Semiconductors - Isis Project No 8924
Mesoporous single-crystal semiconductors which can combine high surface area with vastly improved charge transport properties.
The Oxford invention
Oxford researchers have developed useful semiconductor materials by using templates to seed crystal synthesis to give near 100 percent yield of mesoporous (pores greater than 2 nm and less than 50 nm in diameter) crystal at relatively low temperatures. The key step was found to be pre-treating these templates so that a controlled number of nanocrystals were grown on the templates’ surface. Without this step, product yield was reduced to virtually zero.
These high surface area materials will be important components in technologies such as photovoltaic and light emitting devices as the single crystal structure retains the benefits of the mesoporous structure, while ensuring very high charge mobility. In addition, primary crystallization and mesopore formation is complete before film deposition, thus decoupling temperature processing from device manufacture.
There are numerous reported strategies for the synthesis of mesoporous semiconductor electrodes (e.g. metal oxides) in which precursors (small molecules or nanocrystals) of the target material are mixed with structure-directing agents (e.g. urfactants, block copolymers), or infiltrated into porous templates followed by thermal sintering to induce crystallization.
However in all these cases the crystal domain size is limited to the precursor particle size. This results in many crystalline defects at the grain boundaries, which act as charge trapping sites for electrons and significantly reduce important charge transport. The Oxford invention eliminates this issue.
The synthesis applies to materials such as titanium oxide which is used within optical devices, light emitting devices, electronic devices, photovoltaic cells, catalysts and lithium-battery anodes.
The mesoscale pore structure is advantageous in solar cell applications when looking to provide a high area for surface dye-loading or to increase the contact area between n-type and p-type semiconductors in bulk heterojunction layers.
This technology is now the subject of a patent application and Isis would like to discuss with interested companies the licensing of the technology. Contact the Technology Transfer Manager by using the link below.